In April 2021, the industry’s leading Versal? Aicore and Versal Prime series devices started to mass production, which also means that the ACAP adaptive calculation speed platform created after the FPGA is enabled, and it has made exciting Stage sex,
But just like our universe, Versal? The footsteps of World Development have never stopped. From customer design, ecosystem partners (including third-party reference design, IP, software, and operating system support) to product line (such as the recent Versal AI EDGE and HBM Series) and multiple components of each series, and harden IP Features, reference tests, soft IP libraries, and software libraries, together, and push, continuous advancement.
This article I will focus on the latest developments of the Versal Ai Core series of artificial intelligent developers.
New Features of the Versal Ai Core Series
The latest extension of the Versal Ai Core series is the new two large VC2XXX ACAP series, namely VC2802 and VC2602. If you think that VC2xxxx devices must definitely mean that some important new harden IP features are added to the AI ??Core series, congratulations on your answer! As shown in the following table, the VC2XXX series brings three most exciting new features:
1.aie-ml is the latest version of the AI ??engine, including tightly coupled memory blocks that provide excellent memory access and reduce delay
2. Integrated video decoder unit (VDU) with multiple video decoder engines (VDE)
3.PCIE? GEN5 support
Regarding the difference between AIE-ML and its AI engine within the VC1xxx device, see a detailed introduction to the AI ??engine technology page on Xilinx.com.
Simply put, AIE-ML uses the same infrastructure and tool flow as the AI ??engine, but by adding native support for INT4, BFLOAT16, the local data memory capacity of each AI engine is doubled to 64KB, and added to The AIE-ML array is directly coupled to the 512KB memory block (ie, there is no need to use neighbor programmable logic (PL) in the adaptive engine for memory cache), and AIE-ML can further optimize machine learning. In this way, the AI-ml calculation density of AI-mL is increased by 4 times compared to the AI ??engine, and the time delay is reduced, and the unit power consumption is 4 times compared to the GPU. Each AIE-ML is about 100 DSP58, 2000 LUT, and 16 PL Block Rams, using PL-based implementation can save 33%.
The VDU can support H.264 and H.265 codes of single 4kp60 streams, or up to 32 channels 720p15 streams and all codec between the two. If you want to implement the above criteria in the PL, 120,000 LUT, 50 DSP58 and 3 block RAMs are required each unit. After using hardening VDU, the power consumption of each VDU can be reduced by 3.6W. This makes it ideal for numerous smart video applications. In these applications, multi-video camera is fed to the central hub, and the central hub is responsible for decoding and performing advanced ML algorithms.
In addition, PCIe Gen5 has added support for the most advanced PCI Express standards. This standard will be deployed within the data center to achieve greater bandwidth and higher intelligence in the cloud. Increasing hardening PCIe Gen5 support can bring considerable benefits, not only can save 300,000 LUT, but also save 3W per core power consumption.
Of course, all of these new features in VC2802 and VC2602 ACAP have naturally been used. They will support a large number of new "intelligent" applications, which are widely deployed in the edges and data centers around the world. One example is the smart city application. Such applications use multiple video cameras to monitor traffic or flow of people, and evaluate real-time traffic or peripheral security using real-time ML algorithm.
Another intelligent application is a "intelligent retail anti-loss" application in the retail field. Video cameras can be used in shopping malls and shops, monitoring commodes or commodity label errors in real time in the point of sale. Shrinkage is a major problem for the retail industry, and intelligent retail applications can significantly reduce loss rate.
These are just a Versal ecosystem through expansion, support a small number of new markets and new use cases.
Getting Started Guide
If you are ready to join the world of Versal design, I would like to recommend two evaluation and prototype design platform as your starting point. One is a VCK190 kit and is the first Versal Ai Core Series Assessment Suite. The other is the SmartLynq + module, which is built for high-speed debugging and traceability, providing full visibility of the Versal architecture in the AI ??engine.
In addition, we also offer a wealth of documentation, examples, reference design, resources, and methods to speed up your development work on the assessment platform. If you have just started to touch Versal Acap, you don’t have to worry! You can use our Design Flow Assistant to launch a development plan and use our Design Process Hubs to easily find all documents by design flow. In addition, we also have a large number of Versal and VITIS open source examples and targeted reference designs on Sailive Github.
The joining of VC2802 and VC2602 has brought exciting new features for the AI ??Core series, however, this is not all, there will be more exciting messages in the future. Welcome to apply to join the Versal ACAP Express update list, and take the lead to get the latest product information.
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